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SuperSpeed USB Platform Interoperability Lab 

The SuperSpeed USB Platform Integration Lab (PIL) is available for assistance with SuperSpeed product development. The lab is open for USB-IF members only.  USB-IF members who wish to utilize the SuperSpeed USB Platform Interoperability Lab must complete the SuperSpeed USB PIL Lab Visit Request Form and the appropriate SuperSpeed USB checklist and submit both to admin@usb.org where a Test ID (TID) will be assigned to each SuperSpeed product and an appointment date will be scheduled for the USB 3.0 product.

To test the interoperability of devices and hosts submitted to the PIL, the lab will use a variety of certified SuperSpeed USB hosts and devices. 

Testing will be completed per the following USB 3.0 Product Test Matrix (Updated June 2, 2011)

 

SuperSpeed USB 3.0 and USB 2.0 Pre-Testing Requirement

All SuperSpeed peripherals, peripheral silicon, end user hosts/hubs, and xHCI silicon are required to complete USB 2.0 and USB 3.0 pre-tests at a USB-IF authorized test lab prior to visiting the PIL.  Please be sure to register the product with the USB-IF using the form identified above prior to having pretests performed.

The following test labs are approved to perform USB 3.0 pre-tests:

  • Allion (Taiwan, Japan, Shanghai)
  • MCCI
  • NTS (USA)
  • Testronics
  • TTA

Please contact one of the above authorized test labs directly to inquire about pricing and testing time.

SuperSpeed certification requires each USB 3.0 port to pass all required USB 2.0 compliance tests.  Thus, the approved test facility must satisfactorily perform all the appropriate USB 2.0 compliance tests on each USB 3.0 port.  The approved test lab must also satisfactorily perform all USB 3.0 electrical tests and USB30CV Chapter 9 tests, including appropriate class tests, on each USB 3.0 port.

Motherboard or system submissions must include a Windows 7 (English Version) bootable hard disk with drivers for that system already installed as well as any neccessary RAM, processor and heatsink assembly required for operation. This will be returned once the lab has finished their testing.

When all tests have been satisfactorily completed at the approved test lab, please ship your product for its scheduled appointment at the PIL.

The PIL will finalize all required compliance tests including Interoperability.  All peripherals are required to be tested with both Renesas and Fresco Logic host controllers.  USB 2.0 Link Power Management tests will be performed using the Fresco Logic PDK.

To plan a visit to the SuperSpeed USB Platform Interoperability Lab, return the completed SuperSpeed USB Platform Interoperability Lab Visit Request Form and SuperSpeed USB checklist to admin@usb.org.