SuperSpeed USB Platform Interoperability Lab
Hosted by Intel Corporation

The SuperSpeed USB Platform Integration Lab (PIL) is available for assistance with SuperSpeed product development. The lab is open for USB-IF members only.  USB-IF members who wish to utilize the SuperSpeed USB Platform Interoperability Lab must complete the SuperSpeed USB PIL Lab Visit Request Form and submit it to admin@usb.org.

The lab will use the following hosts to test interoperability of devices submitted to the PIL:
• NEC xHCI host
• Fresco Logic xHCI Host

The lab will use the following devices to test interoperability of hosts submitted to the PIL:
• Lucidport device
• Fresco Logic device

Testing will be completed per the following USB 3.0 Product Test Matrix.

SuperSpeed USB 2.0 Testing Requirement

Due to increased demand for SuperSpeed USB product certification, the PIL lab is reducing test days needed to complete USB 3.0 certification.  To achieve this goal, all SuperSpeed peripherals and end user hosts/hubs that are based on certified silicon are  required to complete USB 2.0 compliance tests at an authorized test lab.   

SuperSpeed products must satisfactorily complete all required USB 2.0 compliance tests:

• Interoperability
• Device Framework Tests (chapter 9)
 • Device Class Framework Tests (if applicable)
• Average current
• Backvoltage
• Inrush
• Signal quality
• If high-speed signaling is supported, all packet parameter tests.

Please contact the authorized test lab of your choice directly to inquire about pricing and testing time.